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Preliminary
100ELT23 5V Dual Differential PECL to TTL Translator (Preliminary)
September 2002 Revised September 2002
100ELT23 5V Dual Differential PECL to TTL Translator (Preliminary)
General Description
The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The 100 series is temperature compensated.
Features
s Typical propagation delay of 3.5 ns s TTL output drive: IOH = 24 mA; IOL = -3 mA s Flow through pinout s Q Output will default to a LOW with the inputs left Open s Internal pull-down resistors on inputs s Fairchild MSOP-8 package is a drop-in replacement to ON TSSOP-8 s Typical ICCH of 23 mA, ICCL of 26 mA s Meets or exceeds JEDEC specification EIA/JESD78 IC latch-up test s Moisture Sensitivity Level TBD s ESD Performance: Human Body Model > TBD Machine Model > TBD
Ordering Code:
Product Order Number 100ELT23M 100ELT23M8 (Preliminary) Package M08A MA08D Code KLT23 KT23 Package Description 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Number Top Mark
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Connection Diagram
Logic Diagram
Top View
Pin Descriptions
Pin Name D0 , D0 , D1 , D1 Q0, Q1 VCC GND Description PECL Differential Inputs TTL Outputs Positive Supply Ground
(c) 2002 Fairchild Semiconductor Corporation
DS500774
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Preliminary 100ELT23 Absolute Maximum Ratings(Note 1)
PECL Supply Voltage (VCC) Input Voltage (VI) VI VCC Storage Temperature (TSTG) Thermal Resistance Junction to Ambient (JA) SOIC Junction to Case (JC) SOIC 0LFPM 500LFPM std bd 0LFPM 500LFPM Junction to Case (JC) MSOP std bd Junction to Ambient (JA) MSOP TBD TBD TBD TBD TBD TBD 0.0V to +7V 0.0V to + 6V
Recommended Operating Conditions
Power Supply Operating ECL Input Voltage Free Air Operating Temperature (TA) VCC = 4.75V to 5.25V 0.0V to VCC
-65C to + 150C
-40C to +85C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
PECL DC Electrical Characteristics VCC = 5.0V; GND = 0.0V (Note 2)
Symbol VIH VIL VIHCMR IIH IIL Parameter Input HIGH Voltage (Single Ended) Input LOW Voltage (Single Ended) Input HIGH Voltage Common Mode Range (Differential) (Note 3) Input HIGH Current Input LOW Current 0.5 -40C Min 3835 3190 2.2 Typ Max 4120 3525 5.0 150 0.5 Min 3835 3190 2.2 25C Typ Max 4120 3525 5.0 150 0.5 Min 3835 3190 2.2 85C Typ Max 4120 3525 5.0 150 Units mV mV V A A
Note 2: VIH and VIL values vary 1 to 1 with VCC. VCC can vary 0.25V. Note 3: VIHCMR minimum varies 1 to 1 with GND. VIHCMR maximum varies 1 to 1 with VCC. Note: Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than 500LFPM maintained.
TTL DC Electrical Characteristics VCC = 5.0V; GND = 0.0V (Note 4)
Symbol VOH VOL ICCH ICCL IOS Parameter Output HIGH Voltage Output LOW Voltage Power Supply Current (Outputs set to HIGH) Power Supply Current (Outputs set to LOW) Output Short Circuit Current (Note 5) -150 23 26 TA = -40C to 85C Min 2.4 0.5 33 36 -60 Typ Max Units V V mA mA mA Condition IOH = -3.0 mA IOL = 24 mA
Note 4: VCC can vary 0.25V. Note 5: For IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged shorting of a HIGH output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. Note: Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than 500LFPM maintained.
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Preliminary
100ELT23
AC Electrical Characteristics VCC = 5.0V; GND = 0.0V (Note 6)(Note 7)
Symbol fMAX tJITTER tPLH, tPHL VPP tr, tf Parameter Maximum Toggle Frequency Cycle-to-Cycle Jitter Propagation Delay to Output Input Swing Output Rise Time (10% to 90%) Output Fall Time (10% to 90%)
Note 6: VCC can vary 0.25V. Note 7: All Loading with 500 to GND, CL = 20 pF.
-40C Min Typ TBD TBD 2.0 200 5.5 1000 2.0 200 Max Min
25C Typ TBD TBD 5.5 1000 1.6 1.1 2.0 200 Max Min
85C Typ TBD TBD 5.5 1000 Max
Units MHz ps ns mV ns
Figure Number
Figure 1 Figure 1 Figure 2
Switching Waveforms
Note: VM varies 1:1 with VEE
FIGURE 1. Differential PECL to TTL Output Propagation Delay
FIGURE 2. TTL Output Edge Rates
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Preliminary 100ELT23 Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M08A
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Preliminary
100ELT23 5V Dual Differential PECL to TTL Translator (Preliminary)
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Package Number MA08D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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